1. Field of the Invention
The present invention relates to a video signal processing apparatus that converts video signals obtained form a solid-state imaging element into digital data and performs various kinds of signal processing. Moreover, the present invention relates to a digital camera constituted with such video signal processing apparatus and solid-state imaging element.
2. Description of the Related Art
Recently, there have been achieved single-chip MOS cameras, owing to a rapid advancement in the digital signal processing technique and CMOS (Complementary Metal Oxide Semiconductor) micronization technology. In a single-chip MOS camera, there are integrated, on a single silicon substrate, a video signal processing apparatus capable of performing high-grade signal processing and an imaging element that picks up optical signals irradiated to the imaging plane by converting them into electric signals.
While it has become possible to provide the single-chip cameras, there has been found that a two-chip structure, in which an imaging chip and a video signal processing chip are formed individually, is advantageous in terms of the performance and the cost.
The video signal processing chip processes vast amount of digital image information at a high speed. Thus, the ratio of the signal processing function among the function of the video signal processing chip increases more and more. Further, a large amount of compression is required on the image information for transmitting still images through portable telephones that are expected to advance more drastically in the future. JPEG (Joint Photographic Experts Group) is known as a method for compressing the image data. In this data compression method, it is necessary to perform a large amount of calculations at a high speed. In order to fabricate the signal processing chips for performing this processing, the latest CMOS micronization technology and CMOS designing technique are essential. Furthermore, an ultrahigh-speed processing circuit is necessary for handling dynamic pictures. Therefore, the state-of-the-art technology of the digital CMOS micronization is required for fabricating the video signal processing chips.
Meanwhile, the imaging chip deals with analog signals, and it differs from the video signal processing chip in this respect. Furthermore, a drastic micronization of the imaging chips is difficult due to a restriction in a photosensitive area such as a lens used in a camera.
Due to the difference described above, the manufacturing processes required for the imaging chips and the video signal processing chips are different. Therefore, if the both chips are forcibly made into a single chip, there may generate a noise and induce deterioration in the imaging performance. In other words, it leads to a high price and poor performance if both chips are forcibly formed into a single chip. Considering those aspects, it has recently been investigated to design the imaging chip and the video signal processing chip individually, when forming the video signal processing chip and the imaging chip into a single chip.
For example, the related art disclosed in US 2004/0201732 comprises a chip set that is a combination of a video signal processing chip constituted with a CMOS and an imaging chip constituted with a transistor in a low-leak current structure formed only with an nMOS type or pMOS type, wherein a timing pulse generating circuit, a gain control amplifier, and an A/D converter circuit are mounted on the video signal processing chip to achieve the low cost. Furthermore, all the circuits of the imaging chip that is designed individually are formed with only the nMOS type or the pMOS type. Thus, only a single kinds of well structures need to be formed in a process diffusion step, so that the number of process steps and the masks can be reduced dramatically. Moreover, it is unnecessary to employ a micronization process in accordance with the video signal processing apparatus, and the imaging chip can be designed separately from the video signal processing apparatus by placing emphasis on the analog performance. Therefore, it is unnecessary to perform forcible micronization process, which results in achieving high performance.
In the above-described related art, however, the analog signal processing circuit is mounted on the video signal processing chip. Thus, the analog signal processing system and the digital signal processing system are mixed within a single video signal processing chip. In that case, the analog signal processing part constituted with the analog signal processing circuit, the AD-converter circuit, etc. and the digital signal processing part are arranged closely within the video signal processing chip, no matter how the circuit layout, and the separation of the power source and ground circuit are contrived. Therefore, it is not possible to prevent the digital noise generated at the time of performing digital signal processing from being mixed into the analog signals.
In the followings, the driving timing of the video signal processing apparatus according to the above-described related art will be described. FIG. 6 is an example of a block diagram for showing the video signal processing apparatus, and FIG. 7 is an example for showing each of the action timings of the signal processing according to the related art.
First, a camera-control microcomputer 16 comprising the timing generating circuit supplies, to a solid-state imaging element 11, a drive control signal S11 containing a horizontal synchronizing signal from a timing supply line for controlling drive in the horizontal direction, a vertical synchronizing signal for controlling drive in the vertical direction, and a pulse for driving the imaging element. A synchronized input video signal S12 is inputted as an analog signal from the solid-state imaging element 11 to a video signal processing apparatus 20. The input video signal S12 is continued by a single horizontal line unit, and a video period as an effective video pixel region containing an optically black part and a horizontal blanking period as a retrace blanking period of the horizontal scanning are set in each of the signals in the horizontal line. The input video signal S12 inputted to the video signal processing apparatus 20 is first captured into the analog signal processing circuit 12 where the analog signal processing is applied, which is then captured into the A/D converter circuit 13 as a video signal S13. The video signal S13 is converted to digital video data S14 by the A/D converter circuit 13, and written to a line memory 14. The video data S14 written to the line memory 14 is outputted in that timing to a digital signal processing circuit 15 as video data S15. The video data S15 receives digital signal processing in the digital signal processing circuit 15, which is then outputted from the video signal processing apparatus 20 as output video data S16.
As shown in FIG. 7, in the video signal processing apparatus 20 of the above-described related art, there exists an overlap period where the analog signal processing period and the digital signal processing period overlap with each other. Therefore, there is such a risk that the digital noise generated at the time of performing digital signal processing may be mixed into the analog signal in the overlap signal processing period.